EUROCOM TN120T Manuel de service Page 67

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Schematic Diagrams
ICH9-M 3/5, GPIO, PWR Management B - 15
B.Schematic Diagrams
ICH9-M 3/5, GPIO, PWR Management
Sheet 14 of 37
ICH9-M 3/5, GPIO,
PWR Management
3. 3 V S
CL_VREF0
3. 3V
CL_VREF1
CL_VREF1
3.3V
CL_VR EF0
3.3VS
3. 3V S
AC_PR ESENT 22MCH _I CH_SYN C#5
SUS _PWR_AC K 2 2
SC I#22
O D D_DET EC T#23
3.3VS5,8,9,10,11,12,13,15,17,18,19,20,21,22,23,24,25,29
CL GP IO 513
CLK_ PWR GD 17
CL_RST#1 19
PM_CLKRUN#19,22
SW I#22
CL _CL K0 5
SERIRQ19,22
ICH_SMBCLK119
PM_SY NC#5
I CH_SPKR21
ICH_SMBCLK010,11,17
ICH_SMBDAT010,11,17
CL K_ IC H1 4 17
SB_BLON18
SB_PWROK 16
CL _CL K1 1 9
CLKEN#29
SLP _S3# 16
3. 3 V2,12,13,15,16,18,19,23,24,27,28
RSMRST# 16,22
SMI#22
CL_ DATA1 19
PM_D PRSLPVR 5,29
PM_TH RM#2
CL_ DATA0 5
PM_STPCPU#17
CL _RST#0 5
CL _PWR OK 5, 16 ,18 ,2 2
CL K_ IC H4 8 17
SUS C# 22
PWR_BTN # 22
ICH_SMBDAT119
P CI E_W AKE#19,23
PM_STP PCI#17
SBSPI _W P#13
SATA_CLKREQ#17
C R _C PPEN#20
LP C P D #19
PM_STPCPU#
PM_STPPC I#
SATA1GP
SB_PWRO K
SLP_S3
GPIO17
PC IE_W AKE#
CL_CLK0
I CH _SMBC LK1
LAN_PWR
RSMRST#
PM_TH RM#
I CH _SMBC LK0
GPIO20
PM_DPR SLPVR
SU S_PW R_AC K
VR M_PW RG D
PM_ STPPC I#
PM_CLKRUN#
SATA0 GP
SU S_PWR _ACK
GPIO24
MCH _ IC H_ SY NC #
SU SCL K
SMI #
I CH _SMBD AT0
CLGPIO5
GPIO13
SATA4 GP
CL_RST#1
SB_BL ON
SB_BATLOW #
CLK_ICH14
CL_PWROK
CL_RST#0
I CH _SMBC LK0
I CH _SMBD AT1
SLP_M#
GPIO18
SC I#
GPIO24
SB_L ANR ST#
SATA4GP
PW R_ BTN#
PM_SY SRST#
C L_DATA1
SC I#
GPIO17
SATA1 GP
PM_ TH RM#
PM_STPC PU#
GPIO9
SW I#
SER IR Q
SLP_S5#
ODD_DETECT#
SATA5 GP
VR M_PW RG D
GPIO60
S4_STATE#
C L_DATA0
C LK_PW RGD
SMI#
LPCPD#
PW R_BTN#
SATA_C LKR EQ#
SATA_ CL KREQ#
I CH _SMBD AT0
CL_CLK1
SB_BLON
VR M_PW RGD
SBSPI _WP#
RSM R ST#
PC IE_ WAKE#
SATA5GP
AC _PR ESENT
ODD_DETECT#
SW I#
SB_LANR ST#
PM_ DPR SLPVR
GPIO9
SU SC#
GPIO13
SATA0GP
CLK_ICH48
PM _C L KRU N#
I CH _SMBD AT1
SB_BATLO W#
I CH _SP KR
I CH _SMBC LK1
MCH _I C H_ SY NC #
SER IRQ
LAN_PWR
GPIO60
PM_ SYSRST#
AC _PRESE NT
CR_CPPEN#
R300 100K_04
C209
0 . 03 3U _ 1 6 V _X 7R _ 04
C4 70
0. 1U _1 0 V _X7R _ 04
R132 10K_04
R 28 6 * 1 00 K _ 04
R110 10K_04
R285 8.2K_04
R1 13
45 3_ 1 % _0 6
R298 8.2K_04
C192 100P_50V_04
R297 *10K_04
SATA
SMBSYS GPIO
GPIO
GPIO
Clocks
Po wer MG TCo ntroll er Lin k
MISC
U19C
I CH 9- M BASE SLB8Q
AH 23
AF1 9
AE21
AD 20
G1 6
A13
E17
C1 7
B18
R4
G1 9
M6
AG19
AH21
AG21
A21
C1 2
A17
AE18
K1
AJ22
L1
A14
E19
AE19
AG22
L4
AF21
E20
M5
AJ23
D2 1
H1
AF3
P1
C16
E16
G17
G20
M2
B13
R3
D20
D22
F19
C10
A9
D1 9
A20
R5
R6
B16
AF8
F24
B19
F22
C19
C25
A19
F21
C18
C20
C11
A16
M7
B21
D18AH24
C2 1
A8
AJ21
AH20
AJ24
AJ20
SATA0GP/ GPI O21
SATA1GP/ GPI O19
SATA4GP/ GPI O36
SATA5GP/ GPI O37
SMBC LK
SMBD ATA
LI NK ALER T#/ GPI O60/C LGPI O4
SMLI NK0
SMLI NK1
SUS_STAT# /LPC PD#
SYS_R ESET#
PMSY NC#/GPI O0
GP I O 1
GP I O 6
GP I O 7
GP I O 8
GP I O 12
SMBA LER T#/ GPI O11
GP I O 17
GP I O 18
SCLO CK/ GP IO22
SATA CLKRE Q#/GPI O35
STP_PC I#
STP_C PU#
SLO AD/GPIO38
SDATAOUT0/GPIO39
CL KR UN #
SDATAOUT1/GPIO48
WAK E#
SERIR Q
TH R M #
VRMPW RG D
CLK14
CLK48
SUSCLK
SLP_ S3#
SLP_ S4#
SLP_ S5#
PWROK
DPRSLPVR/GPIO16
BATLOW#
PWRBTN#
LAN_RST#
RSMR ST#
RI #
S 4 _ST A T E#/ GP I O 26
GP I O 27
GP I O 28
TP 1 1
CK_PWRGD
CL PWR O K
SLP_M#
GP I O 20
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL _VR EF0
CL _VR EF1
CL _R ST 0#
GPIO10/SUS_PWR_ACK
WOL_EN /GPI O9
GPI O14 /AC _PRESE NT
M E M_ LE D / GP I O 24
SPKR
TP 3
CL _R ST 1#GP I O 49
GP I O 13
GP I O 57 / C LG P I O5
TP 1 0
TP 8
MC H _ S Y N C #
TP 9
R162 100K_04
R100 10K_04
R254 *10K_04
R252
453_1%_06
R131 *10K_04
R120 100_04
R119 10K_04
R288 *10K_04
R136 8.2K_04
R259 2.2K_04
R111 1M_04
R257 10K_04
R133 2.2K_04
C205
0.1U_10V_X7R_04
RN15
8P 4R X1 0K _0 4
1
2
3
45
6
7
8
R253
3.24K _1%_04
R1 08
3. 24 K _ 1% _ 0 4
R106 10K_04
RN22
8P 4R X1 0K _0 4
1
2
3
4 5
6
7
8
R 25 8 * 1 00 K _ 04
RN18
8P 4R X1 0K _0 4
1
2
3
45
6
7
8
R282 10K_04
R174 100K_04
Q7
2N 70 02 W
G
DS
R301 100K_04
R256 100K_04
R112
10K_04
Zo= 55O? 5%
CL_VRET0/1=0.405V
12mil s
DDR2, CLK GEN
1 2mils
Zo= 55O? 5%
NEW CARD, MINI CARD
VCORE PWRGD
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