EUROCOM M665N Service Manuel de service télécharger pdf (Page 62)

Schematic Diagrams

B - 12 CALISTOGA STRAPPING

B.Schematic Diagrams

CALISTOGA STRAPPING

+3VS

MC H_C FG_ 56

MC H_C FG_ 66

MC H_C FG_ 76

MCH_C FG_96

MCH_C FG_106

MCH_C FG_116

MCH_C F G_166

MC H _C F G_186

MC H _C F G_196

MC H _C F G_206

+3VS 2,3,6,9,12,13,14,16,17,18,19,20,21,23,24,25,26,27,28,30,32,33,34

R63

*2.2K

R61

*2.2K

R65

*2.2K

R86

*2.2K

R40

2.2K

R64

2.2K

R78

*2.2K

R47

R45

*1K

R34

*1K

MCH_CFG_5

LOW=DMIx2

HI=DMIx4

MCH_CFG_6

LOW=Moby Dick

HI=Calistoga

MCH_CFG_7

LOW=RSVD

HI=Mobile CPU

MCH_CFG_9

LOW=Reverse Lane

HI=Normal operation

MCH_CFG_10 HOST

PLL VCC SELECT

LOW=Reverse Lane

HI=MOBILITY

MCH_CFG_11 PSB

4x CLK EANBLE

LOW=Calistoga

HI=Reversed

MCH_CFG_16(FSB

Dynamic ODT)

LOW=Dynamic ODT Disable

HI==Dynamic ODT Enable

MCH_CFG_18(VCC

SELECT)

LOW=1.05V

HI=1.5V

LOW=Normal

HI=LANES REVERSED

MCH_CFG_19(DMI

LANE REVERSAL)

LOW=only SVDO or PCIE x1 is

operational(defaults)

HI=SVDO and PCIE x1 are

operation simultaneously

via the PEG port

MCH_CFG_20(PCIE

Backward

Interpoerability

mode)

(Def )

(M660N)

Sheet 11 of 40

CALISTOGA

STRAPPING

1 2 ... 57 58 59 60 61 62 63 64 65 66 67 ... 91 92

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EUROCOM M665N Service Manuel de service Page 62

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